The invention relates to a method for generating a data strobe signal in order to transmit the latter over a signal line with tristate behavior from/to a semiconductor memory module for writing/reading data to/from the semiconductor module. The data strobe signal, in response to the outputting or the reception of a read/write command, proceeding from the tristate state, is clocked with a predetermined clock frequency after a short preamble period. The invention also relates to a semiconductor circuit configuration having a semiconductor circuit module with a circuit for generating such a data strobe signal.
In known fast semiconductor memory systems, a clocked write data strobe signal is applied for the purpose of writing data to a semiconductor memory module. Conversely, when data are read from the semiconductor memory module, the latter itself generates a read data strobe signal which is fed to a memory controller, for example. Those data strobe signals are usually transmitted over a signal line with tristate behavior, so that they have a tristate state before they are clocked by a memory controller or the semiconductor memory module. The tristate state makes it possible to use bidirectional signal lines for the transmission of the write data strobe signal and the read data strobe signal, respectively, to and from the semiconductor memory module. As a result, it is possible to reduce power consumption during times when the data strobe signal is not activated. The known fast memory systems require the data strobe signal, after leaving the tristate state, immediately before its activation, to assume a known state, for example the xe2x80x9clowxe2x80x9d state, during a defined very short time duration before it is clocked. That short time duration is called the preamble period. In that case, however, an effect arises whereby the first clocked pulse of the data strobe signal that directly follows the preamble period is offset relative to the system clock system or whereby its edge is delayed. Timing errors thus result during the writing of the data signals to the semiconductor memory module or the reading of the data signals from the semiconductor memory module.
It is accordingly an object of the invention to provide a method for generating a data strobe signal for very fast semiconductor memory systems and a semiconductor circuit configuration with a semiconductor circuit module for the data strobe signal generation, which overcome the hereinafore-mentioned disadvantages of the heretofore-known methods and devices of this general type, which avoid problems associated with conventional generation of the data strobe signals and wherein a temporal position of the data strobe signal is precisely defined.
With the foregoing and other objects in view there is provided, in accordance with the invention, a method for generating a data strobe signal, which comprises transmitting the data strobe signal over a signal line with tristate behavior from/to a semiconductor memory module for writing/reading data to/from the semiconductor memory module. The data strobe signal, in response to outputting or receiving a read or write command, proceeds from the tristate state, is put or displaced into a predetermined state during a defined short preamble period and is clocked with a predetermined clock frequency immediately afterward. The data strobe signal is toggled in the preamble period with at least one pulse corresponding to the clock frequency.
Accordingly, the preamble period of the data strobe signal is occupied by one or more pulses which correspond to the clock frequency of the system clock. The number of pulses put into the preamble period depends on the system requirements. The pulses which occupy the preamble period immediately before the actual data strobe signal pulse that is provided for the data acceptance ensure that the first switch-on/off state (pulse) of the data strobe signal can be ignored by the system. The following switch-on/off state or states has or have a precise temporal position relative to the system clock.
With the objects of the invention in view, there is also provided a semiconductor circuit configuration, comprising a data strobe generating circuit which is provided in a semiconductor circuit module, such as a memory module or a memory controller module, and is set up for generating the data strobe signal with one or more pulses having a clock frequency that corresponds to the clock signal, during the preamble period.
With the data strobe signal generated according to the invention, a signal line with tristate behavior that transmits this data strobe signal may be a bidirectional signal line. Through this line it is possible both to transmit the write data strobe signals from a memory controller to a semiconductor memory module and to transmit read data strobe signals from a semiconductor memory module to a memory controller.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a method and a circuit configuration for generating a data strobe signal for very fast semiconductor memory systems, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.